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INTEGRATED CIRCUITS
DATA SHEET
SZA1010 Digital Servo Driver 3 (DSD-3)
Preliminary specification File under Integrated Circuits, IC01 1997 Apr 07
Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
FEATURES Servo functions * 1-bit class-D focus actuator driver (4 ) * 1-bit class-D radial actuator driver (4 ) * 1-bit class-D sledge motor driver (2 ). Other features * Supply voltage 5 V only * Small package (SOT163-1) * Higher efficiency, compared with conventional drivers, due to the class-D principle * Built-in digital notch filters for higher efficiency * Enable input for focus and radial driver * Enable input for sledge driver * 3-state input for radial driver * Doubled clock frequency * Differential outputs for all drivers * Separate power supply pins for all drivers. QUICK REFERENCE DATA SYMBOL VDDD VDDA(F) VDDA(R) VDDA(S) IDDDq IDDA(F) IDDA(R) IDDA(S) fi(clk) Ptot Tamb digital supply voltage analog supply voltage focus actuator analog supply voltage radial actuator analog supply voltage sledge actuator quiescent digital supply current analog supply current focus actuator analog supply current radial actuator analog supply current sledge actuator input clock frequency total power dissipation operating ambient temperature PARAMETER MIN. 4.5 4.5 4.5 4.5 - - - - - - -40 - - - - - 126 20 150 8.4672 tbf - TYP. GENERAL DESCRIPTION
SZA1010
The SZA1010 or Digital Servo Driver 3 (DSD-3) consists of 1-bit class-D power drivers, which are specially designed for digital servo applications. Three such amplifiers are integrated in one chip, to drive the focus and radial actuators and the sledge motor of a compact disc optical system. The main benefits of using this principle are its higher efficiency grade compared to conventional analog power amplifiers, its higher integration level, its differential output and the fact that only a few external components are needed. When using these digital power drivers in a digital servo application, the statement `complete digital servo loop' becomes more realistic.
MAX. 5.5 5.5 5.5 5.5 10 250 250 560 10 - +85
UNIT V V V V A mA mA mA MHz mW C
ORDERING INFORMATION TYPE NUMBER SZA1010T PACKAGE NAME SO20 DESCRIPTION plastic small outline package; 20 leads; body width 7.5 mm VERSION SOT163-1
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
BLOCK DIAGRAM
SZA1010
dbook, full pagewidth
VDDD 6 4
VDDA(R) VDDA(F) VDDA(S) 13 14 1 END STAGE H-BRIDGE 11 12 RA+ RA-
RAC
DIGITAL NOTCH FILTER
SZA1010
FOC 3 DIGITAL NOTCH FILTER END STAGE H-BRIDGE 15 16 FO+ FO-
SLC CLI EN1 EN2
2 7 8 9 CONTROL
DIGITAL NOTCH FILTER
END STAGE H-BRIDGE
19 20
SL+ SL-
5
10
17
18 VSSA(S)/VSSA(F)
MBK013
VSSD VSSA(R) 3-STATE
Fig.1 Block diagram.
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
PINNING SYMBOL VDDA(S) SLC FOC RAC VSSD VDDD CLI EN1 EN2 VSSA(R) RA+ RA- VDDA(R) VDDA(F) FO+ FO- 3-STATE VSSA(S)/ VSSA(F) SL+ SL- PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DESCRIPTION analog supply voltage for sledge motor driver PDM input for sledge driver PDM input for focus driver PDM input for radial driver digital ground digital supply voltage clock input enable input 1 enable input 2 analog ground for radial driver radial driver (positive output) radial driver (negative output) analog supply voltage for radial driver analog supply voltage for focus focus driver (positive output) focus driver (negative output) radial 3-state input analog ground for sledge driver/focus sledge driver (positive output) sledge driver (negative output) Fig.2 Pin configuration.
EN2 9 VSSA(R) 10
MBK012
SZA1010
handbook, halfpage
VDDA(S) SLC FOC RAC VSSD VDDD CLI EN1
1 2 3 4 5
20 SL- 19 SL+ 18 VSSA(S)/VSSA(F) 17 3-STATE 16 FO-
SZA1010
6 7 8 15 FO+ 14 VDDA(F) 13 VDDA(R) 12 RA- 11 RA+
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
FUNCTIONAL DESCRIPTION Principle of a class-D digital power driver Figure 3 shows the block diagram of one of the digital drivers integrated in the DSD-3. It consists of a timing block and four CMOS switches. The input signal is a 1-bit Pulse Density Modulated (PDM) signal, the output of the digital servo ICs. The maximum operating clock frequency of the device is 10 MHz. In combination with most frequently used Philips digital servo ICs, the operating frequency of the digital drivers is 8.4672 MHz (192 x 44.1 kHz). The sampling frequency of the 1-bit code however is 2.1168 MHz, so internally in the DSD-3 the clock speed of the switches will be 2.1168 MHz. The higher input clock frequency is used to make non-overlapping pulses to prevent short-circuits between the supply voltages. For the control of the switches, two states can be distinguished. If the 1-bit code contains a logic 1, switches A and D are closed and current will flow in the direction as shown in Fig.4. If the 1-bit code contains a logic 0, switches B and C are closed and current will flow in the opposite direction, as shown in Fig.5. This indicates that the difference between the mean number of ones and zeros in the PDM signal determines the direction in which the actuator or motor will rotate. If the mean number of ones and zeros is equal (Idle mode) the current through the motor or actuator is alternated between the positive and negative direction at a speed of half the sample frequency of 2.1168 MHz. This results in a high dissipation and the motor does not move. To improve the efficiency, a digital notch filter is added at the input of the digital drivers. This filters the Idle mode pattern (1010101010 etc.) see Fig.6.
SZA1010
The amplitude transfer as a function of frequency is given in Fig.7. Figure 7 shows that the filter has a zero on 12fs, thereby filtering out the Idle pattern (101010). The output of this filter is a three-level code (1.5-bit). For the control of the switches three states (1.5-bit) can be distinguished: the two states as described earlier and a third one. This state is used when an idling pattern is supplied. Switches C and D are closed (see Fig.8). In this Idle mode, no current will flow and thus the efficiency will be improved. This mode is also used to short-circuit the inductive actuator/motor. In this way, high induction voltages are prevented because the current can commutate via the filter and the short-circuit in the switches. All three drivers (radial, focus and sledge) contain a digital notch filter as described (see Fig.6). Each driver has its own power supply pins to reduce crosstalk due to of the relative high current flowing through the pins. Compared to the DSD-2, the DSD-3 has a 3-state mode for the radial output, which is useful when active damping of the radial actuator is needed. When fast access times are required, the sledge has to move with high accelerations. To prevent the radial actuator from moving too far from its centre position due to the acceleration, active damping is applied. In order to measure the displacement of the radial actuator, the voltage induced by the actuator itself is measured, which is proportional to its speed. The damping consists of a sequence of controlling, waiting, measuring and controlling etc. To be able to measure the induced voltage properly, the influence of the DSD-3 is eliminated by switching it into 3-state mode.
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
SZA1010
VDD Ipos A 1-bit code
(1)
VDD
B
1-bit code '1'
(1)
TIMING
M
TIMING
M
clock
clock C D
MBG786
VSS
MBG787
VSS
(1) Sledge motor; focus/radial motor.
(1) Sledge motor; focus/radial motor.
Fig.3 One of the digital drivers.
Fig.4 1-bit code is logic 1.
VDD Ineg A 1-bit code '0'
(1)
B
1-bit
1/Z
1.5-bit
TIMING
M
clock C
MBG788
MBG789
D
VSS
(1) Sledge motor; focus/radial motor.
The filter consists of a simple delay element (flip-flop) and an adder. The transfer from input-to-output is: H(z) = 1 + z-1.
Fig.5 1-bit code is logic 0.
Fig.6 Notch filter at input of digital drivers.
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
SZA1010
MBG790
|H|
VDD
A 1-bit code 'idle'
B
(1)
TIMING
M
clock C Iidle 1/2fs
MBG791
D
VSS
(1) Sledge motor; focus/radial motor.
Fig.7 Amplitude transfer.
Fig.8 Idling pattern.
Switches The digital part of the power drivers consists of standard cells. The power switches are specifically designed for CD applications. The most important feature is their on-resistance. In the applications, they have to drive very low-ohmic actuators and/or motors. The switches are designed to have an on-resistance of 2 for the actuator drivers and 1 for the sledge motor driver. In any mode, there are always two switches in series with the actuator/motor. The total loss due to the switches is 4 for the actuators and 2 for the sledge motor. 3-state input When the 3-STATE input (pin 17) is made HIGH, the four CMOS switches of the radial driver are opened. Consequently, the radial output pins RA+ (pin 11) and RA- (pin 12) switch into a high impedance state. To set the circuit into 3-state mode, the clock signal (CLI) is not required; the 3-STATE input is a direct, asynchronous input. It has an internal pull-down resistor.
Timing of input and output signals All internal timing signals are derived from the externally supplied CLI signal. Sampling of the data inputs (SLC, FOC and RAC) occurs at a frequency of 14CL. For each channel, the clocking-in occurs at a different positive edge of CLI. Because there are only 3 channels, and the clock frequency CLI is divided-by-4, only 3 out of 4 positive edges are effective for sampling one of the inputs. The switching of the outputs occurs in a similar way, except that in this event the negative edge of CLI is used. In this way, the input signals are immune to the noise radiated by the switching of the outputs. It is possible that an output transition will have a noticeable effect on the power supply voltage or the ground voltage. To avoid simultaneous transitions of all outputs, the outputs of each bridge are also clocked at a different phase of CLI. Consequently there are only 3 out of 4 negative edges effective. To reset the circuit, both the reset condition and the clock should be present, because all flip-flops are reset synchronously. The clock signal is also required to obtain one of the possible modes of operation indicated in Table 1. 7
1997 Apr 07
Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
Table 1 Possible modes of operation EN1 0 0 1 1 EN2 0 1 0 1 SLEDGE DRIVER off off off on FOCUS/RADIAL DRIVER off on off on standby partly operating reset operating
SZA1010
MODE
The timing diagram as shown in Fig.9 gives the relationship between the different clocks. The negative edge of the signals called ncl0 to ncl2 is used to process the incoming data (see Table 2). The negative edge of all signals called cl0s to cl2s is used to trigger the outputs (see Table 2). Table 2 Signals ncl0 to ncl2 and cl0s to cl2s DESCRIPTION sledge input sampling clock focus input sampling clock radial input sampling clock sledge output trigger clock focus output trigger clock radial output trigger clock
SIGNAL ncl0 ncl1 ncl2 cl0s cl1s cl2s
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDDD VDDA(x) VSSD - VSSA(x) Ptot Tstg Tamb digital supply voltage analog supply voltage ground supply voltage difference total power dissipation storage temperature operating ambient temperature PARAMETER MIN. -0.5 -0.5 -5 - -55 -40 MAX. +6.5 +6.5 +5 tbf +150 +85 V V mV mW C C UNIT
THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 75 UNIT K/W
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
CHARACTERISTICS VDDD = VDDA(x) = 5 V; VSSD = VSSA(x) = 0 V; Tamb = 25 C; unless otherwise specified. SYMBOL General VDDD VDDA(x) IDDDq digital supply voltage analog supply voltage quiescent digital supply current note 1 note 1 note 1 4.5 4.5 - - - - - - -40 Tamb = -40 to +85 C Tamb = -40 to +85 C - 0.8VDDD - - - note 2 - - note 2 - - note 2 - - - - 126 20 150 8.4672 tbf - - - - 5.5 5.5 tbf 250 250 560 10 - +85 PARAMETER CONDITIONS MIN. TYP.
SZA1010
MAX.
UNIT
V V A mA mA mA MHz mW C
IDDA(F)(max) maximum analog supply current focus actuator IDDA(R)(max) maximum analog supply current radial actuator IDDA(S)(max) maximum analog supply current sledge actuator fi(clk) Ptot Tamb VIL VIH ILI fclk IO RO IO RO IO RO Notes input clock frequency total power dissipation operating ambient temperature
Digital inputs; SLC, FOC, RAC, CLI, 3-STATE, EN1 and EN2 LOW level input voltage HIGH level input voltage input leakage current 0.2VDDD - 1 V V A
Clock input; CLI clock frequency 8.4672 - tbf - tbf - tbf 10 MHz
Analog outputs; FO+ and FO- output current output resistance 250 4 mA
Analog outputs; RA+ and RA- output current output resistance 250 4 mA
Analog outputs; SL+ and SL- output current output resistance 560 2 mA
V DDA(x)(max) 1. Maximum supply current depends on the value of RL: I max = ----------------------------( RO + RL) 2. Output resistance is defined as the series resistance of the complete bridge.
1997 Apr 07
9
k, full pagewidth
1997 Apr 07
CLI SLC FOC RAC ncI0 ncI1 ncI2 cI0s cI1s cI2s SL+ SL- FO+ FO- RA+ RA-
MBG792
Timing diagram
Philips Semiconductors
Digital Servo Driver 3 (DSD-3)
inputs
10 Fig.9 Timing diagram.
outputs
Preliminary specification
SZA1010
Sampling of the incoming data is marked by a `'.
Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
APPLICATION INFORMATION Figure 10 shows an application example. An LC filter is connected to each output of the SZA1010 in order to remove the PDM square wave signal at the clock frequency. This is done to prevent the relatively long wires to the actuators and motor from radiating and thereby disturbing other circuitry. Therefore it is recommended to place the coils as close as possible to the IC. The LC filter bandwidth has been chosen as high as 20 kHz to ensure that the filter's poles are far enough outside the relevant loop bandwidth, which in this application is approximately 1 kHz. In this way their influence on the closed loop performance is kept to a minimum. Furthermore, the corner frequency has not been chosen higher in order to filter out noise and spurious products as much as possible, because they enlarge the dissipation. The various power supply and ground pins are all connected together in the schematic, but if desired, the focus, radial and sledge power pins can be connected to a separate power supply. The three ground pins are internally connected and therefore should not be separated.
SZA1010
1997 Apr 07
11
(1) See Table 1.
Preliminary specification
SZA1010
Fig.10 Application diagram.
handbook, full pagewidth
1997 Apr 07
100 nF VDDA(F) VDDA(R) VDDA(S) VDDD 100 H SL+ 19 2 3 4 15 RAC 31 3-STATE CLI EN1 EN2 CLKO RA FOC 32 FO 33 20 SLC SL SL- 14 13 1 6 100 H +5 V
Philips Semiconductors
sledge motor
M
Digital Servo Driver 3 (DSD-3)
focus actuator 100 H FO+ FO- 16 7 100 H RA+ 11 12 9 18 1 F (2x) VSSA(S)/VSSA(F) VSSA(R) VSSD from microcontroller (1) 10 5 8 RA- 100 H 100 H
M SZA1010
17
SERVO CONTROLLER (OQ8868) 28
radial actuator
12
M
2.2 F (2x)
1 F (2x)
MBK014
Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
PACKAGE OUTLINE SO20: plastic small outline package; 20 leads; body width 7.5 mm
SZA1010
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013AC EIAJ EUROPEAN PROJECTION A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
8 0o
o
ISSUE DATE 92-11-17 95-01-24
1997 Apr 07
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering
SZA1010
Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Preliminary specification
Digital Servo Driver 3 (DSD-3)
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SZA1010
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Apr 07
15
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547027/00/01/pp16
Date of release: 1997 Apr 07
Document order number:
9397 750 01953

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